Integrated circuits including memory cells

A fluid ejection device comprising:

• a plurality of fluid actuation devices;
• a plurality of memory cells, at least one memory cell of the plurality of memory cells corresponding to each fluid actuation device of the plurality of fluid actuation devices;
• and
• an address decoder to select fluid actuation devices and memory cells corresponding to the selected fluid actuation devices in response to an address.

A fluid ejection device comprising:

• an elongate substrate having a length, a thickness, and a width, wherein on the elongate substrate there is provided:
• a plurality of nozzles arranged in a column along the length of the elongate substrate;
• a plurality of memory cells arranged adjacent to the plurality of nozzles, each memory cell corresponding to a nozzle;
• a configuration register storing data to enable or disable access to the plurality of memory cells;
• an address decoder to select nozzles and memory cells corresponding to the selected nozzles in response to an address;
• and
• fluid actuation logic to either eject fluid from the selected nozzles or access memory cells corresponding to the selected nozzles based on the data stored in the configuration register.