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AssigneeHua Hong Semiconductor (Wuxi) Limited
InventorsXiuyong LIU, Zhengrong CHEN, Changming WU, Jiliang ZHANG, Lipei JIN
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The present application relates to the field of semiconductor forming technologies, in particular to an interlayer dielectric layer structure for a power MOS device and a method for making the same. The interlayer dielectric layer structure for a power MOS device comprises a silicon-rich oxide SiOx film layer deposited on the surface of the power MOS device, wherein a silicon dioxide film layer is deposited on the silicon-rich oxide SiOx film layer. The method for forming an interlayer dielectric layer structure for a power MOS device comprises the following steps: depositing a silicon-rich oxide SiOx film layer on the surface of the power MOS device; and depositing a silicon dioxide film layer on the silicon-rich oxide SiOx film layer.
An interlayer dielectric layer structure for a power MOS device, including a silicon-rich oxide SiOx film layer deposited on the surface of the power MOS device, wherein a silicon dioxide film layer is deposited on the silicon-rich oxide SiOx film layer.
A method for forming an interlayer dielectric layer structure for a power MOS device, including the following steps:
Dependencies are inferred from the claim text.