Fine-grained application-aware latency optimization for virtual machines at runtime

A computer system comprising:

• a hardware platform that includes a plurality of physical CPUs (pCPUs);
• and
• a memory coupled to the pCPUs, wherein
• the memory has loaded therein a hypervisor which includes a kernel scheduler, and the hypervisor supports execution of one or more virtual machines (VMs), each of which includes a plurality of virtual CPUs (vCPUs), and
• when the kernel scheduler determines that a first vCPU of the vCPUs is scheduled to execute a latency-sensitive workload of the VM and a second vCPU of the vCPUs is scheduled to execute a non-latency-sensitive workload of the VM, the kernel scheduler makes an assignment of the first vCPU to a first pCPU of the pCPUs and the second vCPU to a second pCPU of the pCPUs, and causes the latency-sensitive workload to execute on the first vCPU and the non-latency-sensitive workload to execute on the second vCPU, wherein the assignment is such that, during execution of the VM, the kernel scheduler is not permitted to re-assign the first vCPU to any pCPU of the pCPUs and is permitted to re-assign the second vCPU to another pCPU of the pCPUs.

A non-transitory computer-readable medium comprising instructions executable in a computer system having a hardware platform that includes a plurality of physical CPUs (pCPUs) and a memory having loaded therein the instructions which, when executed in the computer system, carries out a method of selectively assigning virtual CPUs (vCPUs) of a virtual machine (VM) running in the computer system to the pCPUs, said method comprising:

• determining that a first vCPU of the vCPUs is scheduled to execute a latency-sensitive workload of the VM and a second vCPU of the vCPUs is scheduled to execute a non-latency-sensitive workload of the VM;
• and
• making an assignment of the first vCPU to a first pCPU of the pCPUs and the second vCPU to a second pCPU of the pCPUs;
• and
• causing the latency-sensitive workload to execute on the first vCPU and the non-latency-sensitive workload on the second vCPU,
• wherein the assignment of the first vCPU is pinned to the first pCPU and the assignment of the second vCPU is not pinned to the second pCPU.