Vertical nonvolatile memory device including memory cell string

A nonvolatile memory device comprising:

• a plurality of memory cell strings,
• each of the plurality of memory cell strings including a semiconductor layer, a plurality of gates and a plurality of insulators, a gate insulating layer, and a resistance change layer,
• the semiconductor layer including a first semiconductor material and extending in a first direction, the semiconductor layer including a first surface and second surface opposite the first surface,
• the plurality of gates and the plurality of insulators each extending in a second direction perpendicular to the first direction, the plurality of gates and the plurality of insulators being alternately arranged in the first direction,
• the gate insulating layer extending in the first direction between the plurality of gates and the first surface of the semiconductor layer and between the plurality of insulators and the first surface of the semiconductor layer,
• the resistance change layer extending in the first direction on the second surface of the semiconductor layer,
• the resistance change layer including a metal-semiconductor oxide including a second semiconductor material and a transition metal oxide, and
• the metal-semiconductor oxide having a charge trap site in a band gap of an oxide of the second semiconductor material.