Display panel

A display panel, comprising a substrate, and a first thin film transistor and a second thin film transistor arranged on the substrate at intervals;

• wherein the first thin film transistor comprises a polysilicon semiconductor layer disposed on the substrate, a first gate disposed above the polysilicon semiconductor layer, and a first source and a first drain respectively connected to the polysilicon semiconductor layer;
• the second thin film transistor comprises an oxide semiconductor layer disposed above the substrate, a third gate disposed above the oxide semiconductor layer, and a second source and a second drain respectively connected to the oxide semiconductor layer;
• a third gate insulating layer corresponding the third gate is disposed between the oxide semiconductor layer and the third gate, and the third gate insulating layer covers part of the oxide semiconductor layer;
• a first metal layer is disposed on a side of the oxide semiconductor layer away from the third gate, a first interlayer insulating layer is disposed between the first metal layer and the oxide semiconductor layer, a second gate insulating layer is disposed on a side of the first metal layer away from the oxide semiconductor layer, and the first metal layer comprises a second gate corresponding to the oxide semiconductor layer;
• a first gate insulation layer is disposed on the polysilicon semiconductor layer and the substrate, the first gate is disposed on the first gate insulation layer, and the first metal layer further comprises an electrode plate corresponding to the first gate;
• the second gate insulating layer is disposed corresponding to the first metal layer, the second gate insulating layer comprises a first insulating portion corresponding to the second gate, and an orthographic projection of the first insulating portion on the substrate covers an orthographic projection of the second gate on the substrate;
• and
• the third gate insulating layer and the third gate have the same pattern, and an orthographic projection of the third gate insulating layer on the substrate Cover the orthographic projection of the third gate on the substrate.