US 2022/0020760 A1 · METHODS OF SEMICONDUCTOR DEVICE FABRICATION

Abstract

Aspects of the disclosure provide a semiconductor device including a string of transistors stacked in a vertical direction over a substrate of the semiconductor device having a channel structure extending in the vertical direction. The string of transistors includes a first substring arranged along a first portion of the channel structure, a second substring arranged along a second portion of the channel structure, and a third substring arranged along a third portion of the channel structure. The second substring is between the first and the third substrings. Gate structures of transistors in the first substring are separated by first insulating layers. Gate structures of transistors in the second substring are separated by second insulating layers. Gate structures of transistors in the third substring are separated by third insulating layers. A volumetric mass density of the second insulating layers is lower than a volumetric mass density of the third insulating layers.

Claims20

Dependent claims

A semiconductor device, comprising:

a string of transistors stacked in a vertical direction over a substrate of the semiconductor device having a channel structure extending in the vertical direction, the string of transistors including a first substring arranged along a first portion of the channel structure, a second substring arranged along a second portion of the channel structure, and a third substring of transistors that is arranged along a third portion of the channel structure, the second substring of transistors being between the first sub string of transistors and the third substring of transistors, wherein
gate structures of transistors in the first substring are separated by first insulating layers, gate structures of transistors in the second substring are separated by second insulating layers, and gate structures of transistors in the third substring are separated by third insulating layers, and
a volumetric mass density of the second insulating layers is lower than a volumetric mass density of the third insulating layers.

A semiconductor device, comprising:

a string of transistors stacked in a vertical direction over a substrate of the semiconductor device having a channel structure extending in the vertical direction, the string of transistors including a first substring of transistors arranged along a first portion of the channel structure, a second substring of transistors arranged along a second portion of the channel structure, and a third substring of transistors arranged along a third portion of the channel structure, the second substring of transistors being between the first substring of transistors and the third substring of transistors, wherein
the first portion of the channel structure has a tapered cylindrical shape, a critical dimension (CD) at a bottom side of the first portion being less than a CD at a top side of the first portion,
a CD in a middle of the second portion of the channel structure is larger than the CD at the bottom side of the first portion and a CD at a bottom side of the third portion, and
the third portion of the channel structure has a tapered cylindrical shape, the CD at the bottom side of the third portion being less than a CD at a top side of the third portion.

1 more element

Dependencies are inferred from the claim text.

Methods of semiconductor device fabrication

Life of this patent

Methods of semiconductor device fabrication

Life of this patent

Abstract

Claims20