Semiconductor devices

A semiconductor device, comprising:

• a substrate including first and second active regions extending in a first direction and isolated from direct contact with each other in the first direction;
• a device isolation layer between the first and second active regions in the substrate;
• and
• first and second gate structures extending in a second direction on the substrate while respectively intersecting end portions of the first and second active regions, the first gate structure including a first gate electrode, the second gate structure including a second gate electrode, the second direction being different from the first direction, the first direction and the second direction both being parallel to an upper surface of the substrate,
• wherein the first gate structure protrudes further toward the device isolation layer as compared to the second gate structure in a vertical direction that is perpendicular to the first and second directions, and a lower end of the first gate electrode is located on a lower height level than a lower end of the second gate electrode.

A semiconductor device, comprising:

• a substrate including first and second active regions extending in a first direction and isolated from direct contact with each other in the first direction;
• a device isolation layer between the first and second active regions in the substrate, the device isolation layer including a liner layer and an isolation insulating layer, sequentially stacked;
• gate structures extending in a second direction on the substrate and intersecting the first and second active regions;
• and
• source/drain regions on the first and second active regions on at least one side of each of the gate structures,
• wherein the gate structures include
• a first gate structure intersecting an end portion of the first active region contacting the device isolation layer and including a first gate electrode,
• a second gate structure intersecting an end portion of the second active region contacting the device isolation layer and including a second gate electrode, and
• a third gate structure isolated from direct contact with the device isolation layer and including a third gate electrode,
• wherein the first gate structure has a shape, different from shapes of the second and third gate structures, and the second gate electrode has a width, different from a width of the third gate electrode in the first direction.