Nonvolatile memory device, storage device, and operating method of nonvolatile memory device

A storage device comprising:

• a nonvolatile memory device including a plurality of memory blocks;
• and
• a controller configured to control a write operation for a selected memory block of the memory blocks of the nonvolatile memory device,
• wherein each of the memory blocks comprises:
• first memory cells corresponding to a first portion of a pillar extending in a direction perpendicular to a substrate;
• and
• second memory cells corresponding to a second portion of the pillar extending in the direction perpendicular to the substrate and disposed on the first portion,
• wherein the first memory cells and the second memory cells are classified into at least one first adjacent memory cell adjacent to a first boundary between the first portion and the second portion and first non-adjacent memory cells being remaining memory cells other than the at least one first adjacent memory cell,
• wherein, in the write operation of the selected memory block, the controller controls the nonvolatile memory device such that the number of bits to be written in the at least one first adjacent memory cell is equal to or smaller than the number of bits to be written in each of the first non-adjacent memory cells when program operations of the first memory cells and the second memory cells are completed.

An operating method of a nonvolatile memory device including memory cells connected in series between a string selection transistor and a ground selection transistor, the method comprising:

• completing first program operations of first memory cells of the memory cells;
• and
• completing a second program operation of at least one second memory cell located between the first memory cells, after completing the first program operations of the first memory cells,
• wherein the memory cells are stacked in a direction perpendicular to a substrate, based on a first portion of a pillar extending in the direction perpendicular to the substrate and a second portion of the pillar extending in the direction perpendicular to the substrate and disposed on the first portion, and
• wherein the at least one second memory cell is more adjacent to a boundary between the first portion and the second portion than the first memory cells.