Erasing large blocks of charge-based memory with hardware support

Method for initializing memory cells of a memory array,

• wherein the individual memory cells are coupled to a common bit line of the memory array via at least one pass element of the individual memory cells,
• wherein each individual memory cell comprises a charge-based storage element including a capacitance,
• wherein the method comprises
• activating pass elements of a plurality of the memory cells to be initialized such that capacitances of the plurality of memory cells are connected simultaneously to the common bit line, and
• initializing the plurality of memory cells by successively increasing a number of the capacitances connected to the common bit line, wherein successively increasing the number of capacitances comprises using already initialized memory cells associated with the plurality of memory cells to initialize a number of the plurality of memory cells corresponding to a number of the already initialized memory cells.

Semiconductor circuit comprising:

• a memory array comprising memory cells,
• wherein individual memory cells are coupled to a common bit line of the memory array via at least one pass element of the individual memory cells,
• wherein each individual memory cell comprises a charge-based storage element including a capacitance, and
• an initialization circuit for initializing the memory cells, wherein the initialization circuit initializes the memory cells by successively increasing a number of capacitances connected to the common bit line and activating pass elements of the memory cells, and wherein successively increasing the number of capacitances comprises using already initialized memory cells to initialize a number of the memory cells corresponding to a number of the already initialized memory cells.