Symbol-Rate Phase Detector for Multi-PAM Receiver
AssigneeRambus Inc.
InventorsMasum Hossain, Nhat Nguyen, Charles Walter Boecker
Life of this patent
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Abstract
A multi-PAM equalizer receives an input signal distorted by inter-symbol interference (ISI) and expressing a series of symbols each representing one of four pulse amplitudes to convey two binary bits of data per symbol. High-order circuitry resolves the most-significant bit (MSB) of each two-bit symbol, whereas low-order circuitry 115 resolves the immediate least-significant bit (LSB). The MSB is used without the LSB for timing recovery and to calculate tap values for both MSB and LSB evaluation.
Claims21
(canceled)
A receiver for digitizing an analog input signal expressing a series of symbols, the receiver comprising:
- an input node to receive the analog input signal expressing the series of symbols;
- a feed-forward equalizer coupled to the input node to equalize the series of symbols and sample the equalized series of symbols to produce digital samples of the series of symbols;
- and
- a second equalizer coupled to the input to equalize the series of symbols, the second equalizer including:
- a first arithmetic element to provide a first offset to the series of symbols to produce a first series of offset symbols;
- a second arithmetic element to provide a second offset to the series of symbols to produce a second series of offset symbols;
- and
- a multiplexer to alternatively select between the symbols of the first series of offset symbols and the second series of offset symbols responsive to the digital samples of the series of symbols.
A method of digitizing an analog input signal expressing a series of symbols, the method comprising:
- sampling the series of symbols to produce a series of analog samples;
- equalizing the series of analog symbols to produce a series of equalized analog samples;
- sampling the series of equalized analog samples to produce a series of equalized digital samples;
- applying a first offset to the series of analog symbols to produce a first offset series of analog symbols;
- applying a second offset to the series of analog symbols to produce a second offset series of analog symbols;
- and
- selecting between ones of the first offset series of samples and ones of the second offset series of samples, responsive to the equalized digital samples, to produce a selected series of offset samples.
A receiver for digitizing an analog input signal expressing a series of symbols, the receiver comprising:
- an analog sampler to sample the series of symbols to produce a series of analog samples;
- means for equalizing the series of analog symbols to produce a series of equalized analog samples;
- a digital sampler to sample the series of equalized analog samples to produce a series of equalized digital samples;
- means for applying first and second offsets to the series of analog symbols to produce respective first and second series of analog symbols;
- and
- means for selecting between ones of the first and second offset series of analog samples responsive to the equalized digital samples to produce a selected series of offset analog samples.
Dependencies are inferred from the claim text.