Processing-in-memory (pim) devices
AssigneeSK hynix Inc.
InventorChoung Ki SONG
Life of this patent
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Abstract
A processing-in-memory (PIM) device includes an CRC logic circuit configured to generate write data and a write fail check signal from write input data when a write operation in an operation mode is performed, and generate a fail flag signal and converted data from read data and a read fail check signal when a read operation in the operation mode is performed; and a MAC operator configured to perform a MAC arithmetic operation for the converted data and buffer data, based on the fail flag signal to generate MAC operation result data.
Claims25
A processing-in-memory (PIM) device comprising:
- a cyclic redundancy checking (CRC) logic circuit configured to generate write data and a write fail check signal from write input data when a write operation in an operation mode is performed, and generate a fail flag signal and converted data from read data and a read fail check signal when a read operation in the operation mode is performed;
- and
- a multiplication and accumulation (MAC) operator configured to perform a MAC arithmetic operation for the converted data and buffer data, based on the fail flag signal to generate MAC operation result data.
A processing-in-memory (PIM) device comprising:
- a storage region configured to receive and store write data and a write fail check signal when a write operation in an operation mode is performed and output read data and a read fail check signal when a read operation in the operation mode is performed;
- and
- a cyclic redundancy checking (CRC) logic circuit configured to generate the write data and the write fail check signal from write input data when the write operation in the operation mode is performed, and generate converted data for a multiplication and accumulation (MAC) arithmetic operation from the read data and the read fail check signal when the read operation in the operation mode is performed.
Dependencies are inferred from the claim text.