Back to results
US 2021/0344351 A1Published application
Device for generating analogue signals
AssigneeTeledyne E2V Semiconductors SAS
InventorGrégory WAGNER
Life of this patent
Estimating the term…
Abstract
Device for generating analogue signals comprises a digital-to-analogue converter comprising at least one digital input and one analogue output, a circuit for generating a first clock signal of frequency fs, and a digital register configured so as to receive at the input and to store N bits representative of an analogue output signal of the converter, N being an integer greater than or equal to 1, and for receiving the first clock signal, the register comprising, for each bit, two complementary digital outputs.
Claims10
Device for generating analogue signals comprising:
- a digital-to-analogue converter comprising at least one digital input and one digital output;
- a circuit for generating a first clock signal of frequency fs;
- a digital register configured in such a manner as to receive at the input, and to store, N bits representative of an analogue output signal from the digital-to-analogue converter, N being an integer greater than or equal to 1, and for receiving the first clock signal, the register comprising, for each bit, two complementary digital outputs;
- and
- a circuit for generating a second clock signal with a frequency m×fs, where m is an integer greater than 1, and N multiplexer circuits, placed between the outputs of the digital register and the inputs of the digital-to-analogue converter and configured such that they each receive, on a control input, the second clock signal and they each receive, on a data input, signals originating from two digital outputs of the register corresponding to the same input bit of the register, in such a manner that the frequency of the signals leaving the multiplexer circuits is 2×m×fs.
2 more elements
Method for generating analogue signals comprising:
- supplying, at an input of a digital register, N bits representative of an analog signal, N being an integer greater than or equal to 1, and applying to this digital register a first clock signal of frequency fs, the register comprising two complementary digital outputs for each input bit;
- applying a second clock signal of frequency 2×m×fs to N multiplexer circuits, m being an integer greater than or equal to 1, and supplying, at the input of the N multiplexer circuits, signals originating from two complementary digital outputs of the register, the multiplexer circuit n receiving the two outputs originating from the same input bit n, n being an integer included between 1 and N;
- supplying, at an input of a digital-to-analogue converter, output signals from the N multiplexer circuits;
- and
- recovering a signal at an output of the converter, said signal originating from a current or voltage value, the spectral response of which is centered around a frequency m×fs.
2 more elements
Dependencies are inferred from the claim text.