Inter-digitated capacitor in flash technology

An integrated chip, comprising:

• a plurality of upper electrode segments separated from a substrate by a first dielectric;
• a lower electrode segment vertically extending from between the plurality of upper electrode segments to within the substrate;
• and
• a second dielectric arranged between the substrate and the lower electrode segment and between the plurality of upper electrode segments and the lower electrode segment, wherein the lower electrode segment has an outermost sidewall that extends from vertically below bottommost surfaces of the plurality of upper electrode segments to uppermost surfaces of the second dielectric and the plurality of upper electrode segments that face away from the substrate.

An integrated chip, comprising:

• a plurality of upper electrode segments separated from a substrate by a first dielectric;
• a lower electrode segment having a sidewall vertically extending from an uppermost surface of the lower electrode segment to within the substrate;
• a second dielectric arranged between the substrate and the lower electrode segment and between the plurality of upper electrode segments and the lower electrode segment;
• and
• wherein the plurality of upper electrode segments have outermost sidewalls that faces one another and that are separated by a non-zero distance extending through the lower electrode segment, as viewed along a cross-sectional view.