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US 2021/0343734 A1Published application
Method for improving control gate uniformity during manufacture of processors with embedded flash memory
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMeng-Han LIN, Wei Cheng WU
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Abstract
A device has a semiconductor substrate including a recessed region. The recessed region has a center portion and a periphery portion. An isolation region abuts the periphery portion. A plurality of gate stacks are in the recessed region. A protective layer overlying the plurality of gate stacks and the isolation region has a substantially planar upper surface across the recessed region and the isolation region.
Claims20
A device, comprising:
- a semiconductor substrate including a recessed region, the recessed region having a center portion and a periphery portion;
- an isolation region abutting the periphery portion;
- a plurality of gate stacks in the recessed region;
- and
- a protective layer overlying the plurality of gate stacks and the isolation region, having a substantially planar upper surface across the recessed region and the isolation region.
2 more elements
A device, comprising:
- a semiconductor substrate including a recessed region, the recessed region having a center portion and a periphery portion;
- and
- a flash memory array in the recessed region, the flash memory array including a plurality of gate stacks and each of the gate stacks having a width, the widths of the gate stacks being uniform for the gate stacks in the center portion of the recessed region and the gate stacks in the periphery portion of the recessed region.
A device, comprising:
- a memory array in a first region of a substrate surrounded by a second region of the substrate, the memory array including:
- a plurality of gate stacks in a central region of the first region and a peripheral region of the first region, each gate stack including:
- a dielectric layer;
- a floating gate separated from the substrate by the dielectric layer;
- and
- a control gate;
- wherein the control gates of the gate stacks have uniform width in the central region and the peripheral region;
- and
- processor circuits in the second region of the substrate, including a plurality of transistors, each having a control gate extending to the same height above the substrate as the control gates of the gate stacks.
6 more elements
Dependencies are inferred from the claim text.