Metallization structures under a semiconductor device layer

A method of fabricating a transistor structure, the method comprising:

• forming features comprising a semiconductor material and separated by isolation, the isolation comprising a dielectric material, and the features having tops opposite bottoms with sidewalls therebetween;
• forming one or more transistor terminals over the tops or the sidewalls of one or more of the features;
• forming trenches self-aligned to the bottoms of the features by etching the isolation selectively to the features;
• and
• forming metallization structures in contact with the isolation with individual ones of the metallization structures separated by the features by at least partially backfilling the trenches with a metal.

A method of fabricating a transistor structure, the method comprising:

• depositing a metal over a base layer comprising a semiconductor;
• patterning the metal into the metallization structures, the patterning exposing the base layer between adjacent ones of the metallization structures;
• growing semiconductor material epitaxially from the base layer until the metallization structures are covered with the semiconductor material;
• patterning the semiconductor material into features;
• and
• forming one or more transistor terminals over a top or sidewall of individual ones of the features.