Semiconductor device with linear parasitic capacitance

A semiconductor device comprising:

• a first component having a negatively charged carrier channel and having first, second and third terminals;
• a second component, having a positively charged carrier channel and having first and second terminals;
• and
• wherein one of the terminals of the first component and the second component is a shared terminal electrically coupled to both the first and second components.

A semiconductor device comprising:

• a first component comprising first a first material layer on a second material layer forming a junction that creates a negatively charged carrier channel;
• a second component comprising first material layer on a second material layer forming a second junction that creates a positively charged carrier channel;
• and
• a gate terminal, wherein the gate terminal is electrostatically coupled to the negatively charged carrier channel of the first component and the positively charged carrier channel of the second component.

A semiconductor device comprising:

• (a) an active component comprising:
• a first narrow-bandgap material layer;
• and
• a first wide-bandgap material layer disposed over material A and having first, second and third electrical connections with the interface between material A and material B corresponding to a negatively charged carrier channel;
• and
• (b) an auxiliary component comprising:
• a second narrow-bandgap material layer;
• a second wide-bandgap material layer disposed over the material B with the interface between material A and material B corresponding to a negatively charged carrier channel;
• a third narrow-bandgap material layer disposed over the second wide-bandgap material layer with the interface between the third narrow-bandgap material layer and the second wide-bandgap material layer corresponding to a positively charged carrier channel with a gate terminal disposed on the third narrow-bandgap material layer;
• and
• a fourth narrow-bandgap material layer disposed over the third narrow-bandgap material layer;
• and
• a bias electrode disposed over fourth narrow-bandgap material layer;
• and
• (b) means for electrically connecting the gate terminal of the auxiliary component to a gate terminal of the active component.