Package substrate insulation opening design
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShu-Jung Tseng, Shyue-Ter Leu
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShu-Jung Tseng, Shyue-Ter Leu
Estimating the term…
A semiconductor package includes: a substrate; a first dielectric layer over the substrate; a first bond pad and a second bond pad over the first dielectric layer, the first bond pad having a first sidewall facing the second bond pad; a second dielectric layer over the first and the second bond pads; and an opening through the second dielectric layer and extending from the first bond pad to the second bond pad, the opening including a first area over and exposing the first bond pad, where in a top view, the opening exposes a first segment of the first sidewall disposed between a first edge and a second edge of the first area that intersect the first sidewall, where the first segment of the first sidewall is between a second segment and a third segment of the first sidewall, the second segment being covered by the second dielectric layer.
A semiconductor package comprising:
A semiconductor package comprising:
A method of forming a semiconductor package, the method comprising:
Dependencies are inferred from the claim text.