Back to results
US 2021/0343609 A1Published application
Cap for package of integrated circuit
AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorsOlivier Franiatte, Richard Rembert
Life of this patent
Estimating the term…
Abstract
A cover for an integrated circuit package includes a central plate and a peripheral frame surrounding the central plate. The peripheral frame is vertically spaced from and parallel to the central plate. The peripheral frame includes through openings formed therein. The cover can be used to package a semiconductor chip that is mounted to a substrate.
Claims22
A method of packaging a semiconductor chip, the method comprising:
- soldering the chip to a substrate;
- arranging a cover over the substrate and the chip, the cover including a central plate overlying the chip and a peripheral frame surrounding the central plate, the peripheral frame including through openings formed therein;
- and
- gluing the peripheral frame to peripheral regions of the substrate so that glue is formed in the through openings.
1 more element
A method of packaging a semiconductor chip, the method comprising:
- attaching a semiconductor die to an upper surface of a substrate;
- and
- attaching a cover overlying the semiconductor die, the cover including a central plate and a peripheral frame physically attached to the substrate, the peripheral frame including through openings formed therein, the central plate and the peripheral frame being made of metal.
Dependencies are inferred from the claim text.