Temporary die support structures and related methods
AssigneeSemiconductor Components Industries, LLC
InventorsFrancis J. CARNEY, Michael J. SEDDON
Life of this patent
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Abstract
Implementations of a semiconductor device may include a semiconductor die comprising a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and a temporary die support structure coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof. The thickness may be between 0.1 microns and 125 microns. The warpage of the semiconductor die may be less than 200 microns.
Claims20
A semiconductor device comprising:
- a semiconductor die comprising a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface;
- and
- a temporary die support structure coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof;
- wherein the thickness is between 0.1 microns and 125 microns;
- and
- wherein a warpage of the semiconductor die is less than 200 microns.
A die support structure comprising:
- a material configured to be temporarily coupled with a semiconductor die comprising a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface;
- wherein the material is configured to be coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof;
- and
- wherein the thickness of the semiconductor die is between 0.1 microns and 125 microns.
A method of forming a die support structure comprising:
- temporarily coupling a material with a semiconductor die:
- wherein the semiconductor die comprises a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface;
- and
- wherein the material is coupled with one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof;
- and
- reducing a warpage of the semiconductor die to less than 200 microns through the material.
Dependencies are inferred from the claim text.