One-time programmable memories with ultra-low power read operation and novel sensing scheme
AssigneeAttopsemi Technology Co., LTD
InventorShine C. Chung
Life of this patent
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Abstract
An OTP with ultra-low power read can be programmed with a minimum and a maximum program voltage. When programming within the range, the post-program OTP to pre-program resistance ratio can be larger than N, where N>50, so that more sensing techniques, such as single-end sensing, can be used to reduce read current. At least one of the OTP cells can be coupled to a common bitline, which can be further coupled to a first supply voltage lines via a plurality of datalines. The resistance in the at least one OTP cell can be evaluated by strobing at least one comparator output of the discharging bitline/dataline.
Claims20
An One-Time Programmable (OTP) memory comprises:
- a plurality of OTP cells, each of the OTP cells including at least an OTP element coupled to a selector;
- the OTP element in at least one of the OTP cell is coupled to a first supply voltage line;
- the selector in at least one of the OTP cells includes an enable signal and is coupled to a second supply voltage line;
- and
- wherein the at least one OTP cell is configured to be programmable within a minimum program voltage and a maximum program voltage by applying voltages to the first, second, and/or the enable signal to program the at least one OTP cell into another resistance state.
An electronic system, comprising:
- a processor;
- and
- a one-time programmable (OTP) memory operatively connected to the processor, the OTP memory includes at least a plurality of OTP cells for providing data storage, each of the OTP cells comprising:
- a one-time programmable (OTP) element coupled to a selector that has an enable signal;
- the OTP element is coupled to a first supply voltage line;
- and
- the selector is coupled to a second supply voltage line,
- wherein the at least one OTP cell is configured to be programmable within a minimum program voltage and a maximum program voltage by applying voltages to the first, second, and/or the enable signal to program the OTP cell into another resistance state.
A method for operating a one-time programmable (OTP) memory, the OTP memory including a plurality of OTP cells, at least one of the OTP cells including a plurality of OTP elements and at least one selector, the OTP elements being coupled to the at least one selector, at least one of the OTP elements being coupled to a first supply voltage line and the at least one selector being coupled to a second supply voltage line, and wherein the method comprises:
- coupling at least one of the OTP cells to a common bitline, which is further coupled to the first supply voltage;
- coupling the at least one of the bitline to a comparator to convert bitline voltage into logic states;
- coupling the at least one of the bitline to at least one capacitor which can be discharged through the OTP element when evaluate the data in the OTP cell;
- and
- converting the resistance in the at least OTP cell into a logic state by strobing the bitline comparator output by a reference clock.
Dependencies are inferred from the claim text.