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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMeng-Sheng Chang, Chia-En Huang, Shao-Yu Chou, Yih Wang
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A multi-fuse memory cell is disclosed. The circuit includes: a first fuse element electrically coupled to a first transistor, a gate of the first transistor is electrically coupled to a first selection signal; a second fuse element electrically coupled to a second transistor, a gate of the second transistor is electrically coupled to a second selection signal, both the first transistor and the second transistor are grounded; and a programming transistor electrically coupled to the first fuse element and the second fuse element, wherein a gate of the programming transistor is electrically coupled to a programming signal.
A multi-fuse memory cell circuit, the circuit comprising:
A method of operating a multi-fuse memory cell, the method comprising:
A memory circuit, the circuit comprising:
Dependencies are inferred from the claim text.