Memory device

A memory device, comprising:

• a plurality of cell strings coupled between a source line and a plurality of bit lines, respectively, wherein each cell string of the plurality of cell strings includes a drain select transistor, memory cells and a source select transistor connected in series between one of the plurality of bit lines and the source line;
• a voltage generator configured to generate operating voltages to be used during a read operation for sensing data stored in a memory cell included in a selected cell string among the plurality of cell strings, wherein the operating voltages include a first drain select line voltage, a second drain select line voltage, and a read voltage;
• and
• a control logic configured to control the voltage generator, before applying the read voltage to the memory cell included in the selected cell string, to apply the first drain select line voltage to a drain select transistor included in a first unselected cell string among the plurality of cell strings, to apply the second drain select line voltage to drain select transistors included in unselected cell strings other that the first unselected cell string among the plurality of cell strings.