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US 2021/0343338 A1Published application
Overwrite read methods for resistance switching memory devices
AssigneeSanDisk Technologies LLC
InventorsMichael K. Grobis, Daniel Bedau, Christopher J. Petti
Life of this patent
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Abstract
A method is provided that includes reading a plurality of resistance-switching memory cells comprising a block of data, decoding the block of data using an error correction code decoder, and based on results of the decoding, selectively performing an overwrite-read process to read the block of data. The overwrite read process determines a change in resistance of the resistance-switching memory cells in response to a write pulse.
Claims20
A method comprising:
- reading a plurality of resistance-switching memory cells comprising a block of data;
- decoding the block of data using an error correction code decoder;
- and
- based on results of the decoding, selectively performing an overwrite-read process to read the block of data,
- wherein the overwrite read process determines a change in resistance of the resistance-switching memory cells in response to a write pulse.
2 more elements
A system comprising:
- a control circuit configured to:
- read a plurality of resistance-switching memory cells comprising a block of data;
- decode the block of data using an error correction code decoder;
- selectively perform an overwrite-read process to read the block of data based on results of the decoding, wherein for each resistance-switching memory cell of the plurality of resistance-switching memory cells the overwrite-read process comprises:
- applying a read voltage to the resistance-switching memory cell to determine a first memory cell resistance;
- applying a first write voltage to the resistance-switching memory cell;
- determining a second memory cell resistance of the resistance-switching memory cell at the first write voltage;
- and
- comparing the first memory cell resistance to the second memory cell resistance to determine that the resistance-switching memory cell is in a first memory state or a second memory state.
6 more elements
A method comprising:
- reading a plurality of resistance-switching memory cells comprising a block of data;
- determining that an ECC decoder did not successfully detect and correct bit errors in the block of data;
- re-reading the block of data using an overwrite-read process to determine a change in resistance of the resistance-switching memory cells in response to a write pulse.
Dependencies are inferred from the claim text.