Display panel, shift register circuit and driving method thereof

A display panel including a stage circuit, wherein the stage circuit includes cascaded shift register circuits, wherein each cascaded shift register circuit includes:

• a first control module, wherein the first control module receives an input signal and a charging signal, and generates a voltage signal at a second node in response to a first clock signal and a voltage signal at a first node;
• a second control module, where the second control module receives the input signal and a first voltage signal, and generates the voltage signal at the first node in response to the first clock signal, a second clock signal, and the voltage signal at the second node;
• and
• an output module, wherein the output module receives a first voltage signal and the second clock signal, and generates an output signal in response to the voltage signal at the first node and a voltage signal at a fourth node, wherein:
• the first control module includes a first transistor and a third transistor,
• the third transistor is configured to be turned on in response to the first clock signal to provide the charging signal to the second node, and
• the first transistor is configured to be turned on in response to the voltage signal at the first node to provide the input signal to the second node,
• wherein:
• with an exception of a first stage cascaded shift register circuit, a first transistor of a current stage cascaded shift register circuit has a first end connected to a signal output terminal of a previous stage cascaded shift register circuit, a second end connected to the second node, and a control end connected to the first node.