Allocating computations of a machine learning network in a machine learning accelerator
AssigneeSiMa Technologies, Inc.
InventorsReed Kotler, Nishit Shah
Life of this patent
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AssigneeSiMa Technologies, Inc.
InventorsReed Kotler, Nishit Shah
Estimating the term…
A compiler receives a description of a machine learning network and generates a computer program that implements the machine learning network. The compiler allocates instructions of the computer program to different groups of processing elements (Tiles) for execution such that different groups of Tiles implement different layers of the machine learning network. The compiler may determine the size of the different groups based on a partial computation metric associated with the computations performed to implement the corresponding layer. Furthermore, the compiler may assign specific Tiles to each group based on a set of predefined layout constraints. The compiler may statically schedule at least a portion of the instructions into one or more deterministic phases for execution by the groups of Tiles.
A method for implementing a machine learning network on a machine learning accelerator (MLA), the MLA comprising one or more meshes of interconnected Tiles implemented on a semiconductor die, the method comprising:
A non-transitory computer readable storage medium storing instructions for implementing a machine learning network on a machine learning accelerator (MLA), the MLA comprising one or more meshes of interconnected Tiles implemented on a semiconductor die, the instructions when executed by one or more processors causing the one or more processors to perform steps including:
A machine learning accelerator device comprising:
Dependencies are inferred from the claim text.