US 2021/0342677 A1Published application

Architecture for a hardware based explainable neural network

AssigneeUMNAI Limited

InventorsAngelo DALLI, Mauro PIRRONE

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Abstract

Explainable neural networks may be designed to be easily implementable in hardware efficiently, leading to substantial speed and space improvements. An exemplary embodiment extends upon possible hardware embodiments of XNNs, making them suitable for low power applications, smartphones, mobile computing devices, autonomous machines, server accelerators, Internet of Things (IoT) and edge computing applications amongst many other applications. The capability of XNNs to be transformed from one form to another while preserving their logical equivalence is exploited to create efficient, secure hardware implementations that are optimized for the desired application domain and predictable in their behavior.

Claims30

Dependent claims

A system for an artificial neural network that is implemented by hardware and that is interpretable and explainable, comprising:

an input layer configured to receive an input and identify one or more input features;
a conditional network, comprising:
a conditional layer configured to model the input features based on one or more partitions, wherein each of the one or more partitions comprises a rule;
an aggregation layer configured to aggregate one or more rules into one or more aggregated partitions;
and
a switch output layer configured to selectively pool the aggregated partitions from the aggregation layer with the one or more partitions from the conditional layer;
a prediction network, comprising:
a feature generation and transformation network comprising one or more transformation neurons configured to apply one or more transformations to the input features;
a fit layer configured to combine features which have been transformed by the feature generation and transformation network to identify one or more coefficients related to at least one of:
one or more features and one or more partitions;
a value output layer configured to analyze the one or more coefficients and configured to output a value related to at least one of the one or more features or the one or more partitions;
and
an output layer configured to generate an output which is interpretable and explainable by at least one of a machine program or a human;
wherein at least one layer is implemented in at least one hardware circuit;
wherein each of the one or more partitions forms at least one local model and a combination of local models forms a global model;
and
wherein one or more execution paths throughout the partitions are identifiable by an external process.

14 more elements

A computer implemented method for providing an artificial neural network in hardware that is explainable and interpretable, comprising executing on a processor the steps of:

inputting a set of data into an input layer;
partitioning the input based on one or more input features identified in the input, creating one or more partitions;
aggregating one or more of the partitions;
applying one or more transformation functions to the partitioned input features, providing a set of transformed features;
combining the transformed features and identifying one or more coefficients corresponding to the transformed features;
compiling one or more equations based on the coefficients and the transformed features;
compiling one or more rules based on the equation and the partitions;
implementing at least one of the one or more rules and the one or more equations into one or more hardware circuits,
applying the equations and rules to the set of input features to obtain an output value;
and
outputting the output value and generating an explanation of the output value, wherein the explanation accounts for at least one of the coefficients;
wherein each of the one or more partitions forms at least one local model and a combination of local models forms a global model;
and
wherein one or more paths throughout the partitions are identifiable by an external process.

11 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/245,328Filed 30 Apr 2021
Priority: 1 May 2020
Published: 4 Nov 2021
Term ends: Not estimatedThe source records don’t support an estimate.

Classification13 codes

G06N 3/042
Architecture, e.g. interconnection topology: knowledge-based neural networks; Logical representations of neural networks
G06N 3/063
Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons: using electronic means
G06N 3/045
Architecture, e.g. interconnection topology: combinations of networks
G06N 3/0464
Architecture, e.g. interconnection topology: convolutional networks [CNN, ConvNet]

Family

Application63/018,605Us provisional application · filed 1 May 2020
US 11,468,308 B2Related patent
US 2021/0342677 A1This patent

From the US filing history. Foreign family members aren’t listed.

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