Handling asynchronous power loss in a memory sub-system that programs sequentially
AssigneeMicron Technology, Inc.
InventorsJohnny A. Lam, Alex J. Wesenberg, Michael Winterfeld
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsJohnny A. Lam, Alex J. Wesenberg, Michael Winterfeld
Estimating the term…
A system includes a non-volatile memory (NVM), and a volatile memory to store: a zone map data structure (ZMDS) that maps a zone of a logical block address (LBA) space to a zone index; and a high frequency update table (HFUT). A processing device is to: write, within an entry of the HFUT, a value of a zone write pointer corresponding to the zone index for an active zone, wherein the zone write pointer includes a location in the LBA space for the active zone; write, within an entry of the ZMDS, a table index value that points to the entry of the HFUT; and journal metadata of the entry of one the ZMDS or the HFUT affected by a flush transition between the ZMDS and the HFUT.
A system comprising:
A method comprising:
A non-transitory computer-readable medium storing instructions, which when executed by a processing device of a memory sub-system controller, cause the processing device to perform a plurality of operations comprising:
Dependencies are inferred from the claim text.