Direct-input redundancy scheme with adaptive syndrome decoder

An apparatus, comprising:

• a bit flipping circuit configured to invert data bits;
• and
• a syndrome decoder for a data plane, the syndrome decoder coupled with the bit flipping circuit and comprising:
• a first decoder configured to receive a first set of bits generated based at least in part on a set of data and comprising syndrome bits, inverted syndrome bits, or a combination thereof;
• and
• a second decoder configured to receive a second set of bits comprising inverted versions of the first set of bits.

A method, comprising:

• receiving, at a first decoder of a syndrome decoder for a data plane, a first set of bits generated based at least in part on a set of data and comprising syndrome bits, inverted syndrome bits, or a combination thereof;
• receiving, at a second decoder of the syndrome decoder, a second set of bits comprising inverted versions of the first set of bits;
• and
• inverting, by a bit flipping circuit, one or more bits of the set of data based at least in part on an output of the syndrome decoder, the output of the syndrome decoder based at least in part on the first set of bits or the second set of bits.

An apparatus, comprising:

• a bit flipping circuit configured to invert data bits;
• a syndrome decoder for a data plane and coupled with the bit flipping circuit, the syndrome decoder comprising a first decoder and a second decoder;
• and
• a controller coupled with the bit flipping circuit and the syndrome decoder and operable to cause the apparatus to:
• receive, at the first decoder, a first set of bits generated based at least in part on a set of data and comprising syndrome bits, inverted syndrome bits, or a combination thereof;
• receive, at the second decoder, a second set of bits comprising inverted versions of the first set of bits;
• and
• invert, by the bit flipping circuit, one or more bits of the set of data based at least in part on an output of the syndrome decoder, the output of the syndrome decoder based at least in part on the first set of bits or the second set of bits.