Low area multiply and accumulate unit

An electronic device comprising:

• a plurality of current carrying elements, each current carrying element of a uniform size to each provide a matched current output;
• a first current splitter and a second current splitter each first and second current splitter coupled with respective first matched current carrying element and a second matched current carrying element, the first and second current splitters comprising a first hierarchy current scaling network, the first current splitter having a first series of weighted switching transistor structures receiving a first input digital word to be multiplied and the second current splitter having a second series of weighted switching transistor structures receiving a second input digital word to be multiplied,
• each respective weighted switching transistor of the first series configured for dividing current received from its coupled current carrying element according to the weighting scheme to provide a first multiplication path current flow output of said first current splitter, and each respective weighted switching transistor of the second series configured for dividing current received from its coupled current carrying element according to the weighting scheme to provide a second multiplication path current flow output of said second current splitter;
• a first output conductor receiving the first multiplication path current flow output;
• a second output conductor receiving the second multiplication path current flow output;
• and
• a second hierarchy current scaling network connected to the first hierarchy current scaling network, said second hierarchy current scaling network comprising:
• third and fourth current splitters, the third current splitter coupled with said first output conductor, and said fourth current splitter coupled with said second output conductor.