Method of accessing a memory, and corresponding circuit

A circuit comprising:

• a memory for storing data;
• a processing circuit for processing data;
• a memory controller circuit;
• and
• an interconnect bus;
• coupling the memory controller circuit to the memory and the processing circuit;
• wherein the processing circuit is configured to:
• generate memory transaction requests comprising respective bursts of memory access requests towards a set of memory locations in the memory, the memory locations having respective memory addresses;
• and
• transmit via the interconnect bus to the memory controller circuit first signals conveying the memory transaction requests and second signals conveying information for mapping the bursts of memory access requests onto respective memory addresses of the memory locations in the memory;
• and
• wherein the memory controller circuit is configured to:
• compute, as a function of the information conveyed by the second signals, respective memory addresses of the memory locations;
• and
• access the memory locations to read data from the memory locations for processing by the processing circuit and/or to write data processed by the processing circuit into the memory locations.

An electronic system comprising:

• system interconnect network;
• a central processing unit coupled to the system interconnect network;
• a main system memory coupled to the system interconnect network;
• a direct memory access controller coupled to the system interconnect network;
• and
• a digital signal processor coupled to the system interconnect network, the digital signal processor comprising:
• a local memory for storing data;
• a local processing circuit for processing data;
• a local memory controller circuit;
• and
• a local interconnect bus;
• coupling the local memory controller circuit to the local memory and the local processing circuit;
• wherein the local processing circuit is configured to:
• generate memory transaction requests comprising respective bursts of memory access requests towards a set of memory locations in the local memory, the memory locations having respective memory addresses;
• and
• transmit via the local interconnect bus to the local memory controller circuit first signals conveying the memory transaction requests and second signals conveying information for mapping the bursts of memory access requests onto respective memory addresses of the memory locations in the local memory;
• and
• wherein the local memory controller circuit is configured to:
• compute, as a function of the information conveyed by the second signals, respective memory addresses of the memory locations;
• and
• access the memory locations to read data from the memory locations for processing by the local processing circuit and/or to write data processed by the local processing circuit into the memory locations.