US 2021/0334138 A1 · TECHNOLOGIES FOR PRE-CONFIGURING ACCELERATORS BY PREDICTING BIT-STREAMS

Abstract

Technologies for pre-configuring accelerators by predicting bit-streams include communication circuitry and a compute device. The compute device includes a compute engine to determine one or more bit-streams registered on each accelerator of multiple accelerators. The compute engine is further to predict a next job to be requested for acceleration from an application of at least one compute sled of multiple compute sleds, predict a bit-stream from a bit-stream library that is to execute the predicted next job requested to be accelerated, and determine whether the predicted bit-stream is already registered on one of the accelerators. In response to a determination that the predicted bit-stream is not registered on one of the accelerators, the compute engine is to select an accelerator from the plurality of accelerators that satisfies characteristics of the predicted bit-stream and register the predicted bit-stream on the determined accelerator.

Claims20

Dependent claims

A system comprising:

a plurality of Field Programmable Gate Array (FPGA) resources;
a plurality of compute devices;
and
an orchestrator in communication with the plurality of compute devices and the plurality of FPGA resources, the orchestrator to manage an FPGA bit-stream library, the orchestrator to register a bit-stream in the FPGA bit-stream library to one of the plurality of FPGA resources.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

17/365,898Filed 1 Jul 2021

Priority

IN 20174103063230 Aug 2017

Published

28 Oct 2021

Term ends

Not estimatedThe source records don’t support an estimate.

Classification21 codes

G06F 9/4887
Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues: involving deadlines, e.g. rate based, periodic
G06F 9/48
Multiprogramming arrangements: program initiating; Program switching, e.g. by interrupt
G06F 9/4843
Task transfer initiation or dispatching: by program, e.g. task dispatcher, supervisor, operating system
G06F 9/4881
By program, e.g. task dispatcher, supervisor, operating system: scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Technologies for pre-configuring accelerators by predicting bit-streams

Life of this patent

Technologies for pre-configuring accelerators by predicting bit-streams

Life of this patent

Abstract

Claims20