US 2021/0333667 A1 · ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND DISPLAY APPARATUS

Abstract

The disclosure relates to an array substrate. The array substrate may include a base substrate, an auxiliary electrode, a thin film transistor, a first insulating layer, a first electrode, a second insulating layer, and a second electrode sequentially arranged in a direction away from the base substrate. The auxiliary electrode is between the first insulating layer and the second insulating layer and insulated from the first electrode, the auxiliary electrode is coupled to a drain of the thin film transistor through a first via hole in the first insulating layer, and the second electrode is coupled to the auxiliary electrode through a second via hole in the second insulating layer.

Claims19

Dependent claims

An array substrate, comprising:

a base substrate;
an auxiliary electrode;
a thin film transistor, a first insulating layer, a first electrode, a second insulating layer, and a second electrode sequentially arranged in a direction away from the base substrate,
wherein the auxiliary electrode is between the first insulating layer and the second insulating layer and insulated from the first electrode, the auxiliary electrode is coupled to a drain of the thin film transistor through a first via hole in the first insulating layer, and the second electrode is coupled to the auxiliary electrode through a second via hole in the second insulating layer.

1 more element

A method of fabricating an array substrate, comprising:

forming a thin film transistor on the base substrate;
forming a first insulating layer having a first via hole on the base substrate on which the thin film transistor was formed, orthographic projection of the first via hole on the base substrate overlapping orthographic projection of a drain of the thin film transistor on the base substrate;
forming a common electrode and an auxiliary electrode insulated from each other on the base substrate on which the first insulating layer was formed, the auxiliary electrode being coupled to the drain through the first via hole;
forming a second insulating layer having a second via hole on the base substrate on which the common electrode and the auxiliary electrode were formed, orthographic projection of the second via hole on the base substrate overlapping orthographic projection of the auxiliary electrode on the base substrate;
and
forming a pixel electrode on the base substrate on which the second insulating layer was formed, the pixel electrode being coupled to the auxiliary electrode through the second via hole.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

16/619,249Filed 22 May 2019

Priority

CN 201910008051.14 Jan 2019

Published

28 Oct 2021

Term ends

Not estimatedThe source records don’t support an estimate.

Classification12 codes

G02F 1/136227
Active matrix addressed cells: through-hole connection of the pixel electrode to the active element through an insulation layer
G02F 1/134309
Electrodes: characterised by their geometrical arrangement
G02F 1/13439
Electrodes: characterised by their electrical, optical, physical properties; materials therefor; method of making
G02F 1/1368
Active matrix addressed cells: in which the switching element is a three-electrode device

Array substrate and manufacturing method thereof, display panel and display apparatus

Life of this patent

Array substrate and manufacturing method thereof, display panel and display apparatus

Life of this patent

Abstract

Claims19