US 2021/0333608 A1 · ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE

Abstract

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a plurality of gate lines on a side of the base substrate; a plurality of data lines on a side of the plurality of gate lines away from the base substrate and intersecting with the plurality of gate lines; and a plurality of light shielding metal portions between the base substrate and each of the plurality of gate lines; respective one of the gate lines includes a plurality of gate line sub-segments separated by the plurality of data lines, respectively, every two adjacent gate line sub-segments in the respective one of the gate lines correspond to one of the light shielding metal portions, and the every two adjacent gate line sub-segments are connected in series through the one of the light shielding metal portions.

Claims20

Dependent claims

An array substrate, comprising:

a base substrate;
a plurality of gate lines, disposed on a side of the base substrate;
a plurality of data lines, disposed on a side of the plurality of gate lines away from the base substrate and intersecting with the plurality of gate lines;
and
a plurality of light shielding metal portions, disposed between the base substrate and each of the plurality of gate lines, respectively,
wherein respective one of the gate lines comprises a plurality of gate line sub-segments separated by the plurality of data lines, respectively, every two adjacent gate line sub-segments in the respective one of the gate lines correspond to one of the light shielding metal portions, and the every two adjacent gate line sub-segments in the respective one of the gate lines are connected in series through the one of the light shielding metal portions.

3 more elements

A manufacturing method of an array substrate, comprising:

providing a base substrate, and forming a plurality of light shielding metal portions on a side of the base substrate;
forming a plurality of gate lines on a side of the plurality of light shielding metal portions away from the base substrate, wherein respective one of the gate lines comprises a plurality of gate line sub-segments, every two adjacent gate line sub-segments in the respective one of the gate lines correspond to one of the light shielding metal portions, and the every two adjacent gate line sub-segments in the respective one of the gate lines are connected in series through the one of the light shielding metal portions;
forming a plurality of data lines on a side of the plurality of gate line away from the plurality of light shielding metal portions, wherein the every two adjacent gate line sub-segments are located at two sides of a respective data line, respectively.

Dependencies are inferred from the claim text.

Facts

Application

16/606,895Filed 16 May 2019

Priority

CN 201810652245.022 Jun 2018

Published

28 Oct 2021

Term ends

Not estimatedThe source records don’t support an estimate.

Classification14 codes

G02F 1/13606
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit: having…
G02F 1/136209
Active matrix addressed cells: light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally…
G02F 1/136218
Active matrix addressed cells: shield electrodes
G02F 1/136286
Active matrix addressed cells: wiring, e.g. gate line, drain line

Array substrate and manufacturing method thereof, display device

Life of this patent

Array substrate and manufacturing method thereof, display device

Life of this patent

Abstract

Claims20