Biased amplifier

A circuit comprising:

• an input configured to couple to a sensor;
• an output;
• a ground input;
• a first resistor and a second resistor coupled in series between the output and the ground input;
• a first transistor that includes a source, a drain, a gate, and a bulk, wherein the first resistor is coupled between the output and the gate of the first transistor;
• a second transistor that includes a source, a drain, a gate, and a bulk, wherein the input is coupled to the gate of the second transistor;
• a third resistor and a fourth resistor coupled in series between the source of the first transistor and the source of the second transistor;
• and
• a bias circuit coupled to the bulk of the first transistor and to the bulk of the second transistor and configured to provide a first bias voltage at the bulk of the first transistor and a second bias voltage at the bulk of the second transistor.

A circuit comprising:

• a positive supply voltage input;
• a negative supply voltage input;
• a first bias voltage input;
• a second bias voltage input;
• a sensor input;
• an output;
• a first transistor and a second transistor coupled in series between the positive supply voltage input and the output, wherein the first transistor includes a gate coupled to the first bias voltage input and the second transistor includes a gate coupled to the second bias voltage input;
• a first resistor and a second resistor coupled in series between the output and the negative supply voltage input;
• a third transistor coupled between the output and the negative supply voltage input;
• a fourth transistor and a fifth transistor coupled in series between the positive supply voltage input and a first node, wherein the fourth transistor includes a gate coupled to the first bias voltage input and the fifth transistor includes a gate coupled to the second bias voltage input;
• a third resistor, a sixth transistor, a seventh transistor, and an eighth transistor coupled in series between the first node and the negative supply voltage input, wherein the sixth transistor includes a gate coupled to a second node between the first resistor and the second resistor;
• and
• a fourth resistor, a ninth transistor, a tenth transistor, and an eleventh transistor coupled in series between the first node and the negative supply voltage input, wherein the ninth transistor includes a gate coupled to the sensor input.