Buffer circuit and buffer

A buffer circuit, adopting a buffer circuit applied to an input buffer, and the adopted buffer circuit comprises:

• an input follower circuit, an input end of the input follower circuit is connected with a first input signal to follow a voltage change of the first input signal;
• an input follower linearity boosting circuit connected with the input follower circuit and a first voltage bootstrap circuit, to improve follower linearity of the input follower circuit;
• the first voltage bootstrap circuit connected between the first input signal and the input follower linearity boosting circuit, a difference between an output voltage and an input voltage of the first voltage bootstrap circuit is a fixed level, to provide a corresponding quiescent operation point voltage for the input follower linearity boosting circuit;
• a second voltage bootstrap circuit, an input end of the second voltage bootstrap circuit is connected with a second input signal, and an output end of the second voltage bootstrap circuit is connected with an input end of a compensation follower circuit, a difference between an output voltage and an input voltage of the second voltage bootstrap circuit is a fixed level, to provide a corresponding quiescent operation point for the compensation follower circuit, wherein the second input signal and the first input signal are equal in magnitude and opposite in direction;
• a third voltage bootstrap circuit, an input end of the third voltage bootstrap circuit is connected with the output end of the second voltage bootstrap circuit, to provide a corresponding quiescent operation point voltage for a compensation follower linearity boosting circuit;
• a compensation follower circuit, an input end of the compensation follower circuit is connected with the output end of the second voltage bootstrap circuit, to follow a compensation voltage being bootstrapped by the second voltage bootstrap circuit;
• the compensation follower linearity boosting circuit, an input end of which is connected with an output end of the third voltage bootstrap circuit, to improve follower linearity of the compensation follower circuit;
• a first load connected in parallel between the input follower circuit and the compensation follower linearity boosting circuit to collect a buffered voltage;
• a bias circuit, an input end of the bias circuit is connected with a bias voltage, to provide a bias current for the buffer;
• a bias linearity boosting circuit connected between the compensation follower circuit and the bias circuit, to improve linearity of the bias circuit;
• and
• a second load connected in parallel between the compensation follower circuit and the bias linearity boosting circuit to generate a nonlinear compensation current;
• wherein the buffer circuit generates one or two nonlinear compensation currents in a differential or single-ended form.

A buffer, comprising a buffer circuit, wherein the buffer circuit is applied to an input buffer and comprises:

• an input follower circuit, an input end of the input follower circuit is connected with a first input signal to follow a voltage change of the first input signal;
• an input follower linearity boosting circuit connected with the input follower circuit and a first voltage bootstrap circuit, to improve follower linearity of the input follower circuit;
• the first voltage bootstrap circuit connected between the first input signal and the input follower linearity boosting circuit, a difference between an output voltage and an input voltage of the first voltage bootstrap circuit is a fixed level, to provide a corresponding quiescent operation point voltage for the input follower linearity boosting circuit;
• a second voltage bootstrap circuit, an input end of the second voltage bootstrap circuit is connected with a second input signal, and an output end of the second voltage bootstrap circuit is connected with an input end of a compensation follower circuit, a difference between an output voltage and an input voltage of the second voltage bootstrap circuit is a fixed level, to provide a corresponding quiescent operation point for the compensation follower circuit, wherein the second input signal and the first input signal are equal in magnitude and opposite in direction;
• a third voltage bootstrap circuit, an input end of the third voltage bootstrap circuit is connected with the output end of the second voltage bootstrap circuit, to provide a corresponding quiescent operation point voltage for a compensation follower linearity boosting circuit;
• a compensation follower circuit, an input end of the compensation follower circuit is connected with the output end of the second voltage bootstrap circuit, to follow a compensation voltage being bootstrapped by the second voltage bootstrap circuit;
• the compensation follower linearity boosting circuit, an input end of which is connected with an output end of the third voltage bootstrap circuit, to improve follower linearity of the compensation follower circuit;
• a first load connected in parallel between the input follower circuit and the compensation follower linearity boosting circuit to collect a buffered voltage;
• a bias circuit, an input end of the bias circuit is connected with a bias voltage, to provide a bias current for the buffer;
• a bias linearity boosting circuit connected between the compensation follower circuit and the bias circuit, to improve linearity of the bias circuit;
• and
• a second load connected in parallel between the compensation follower circuit and the bias linearity boosting circuit to generate a nonlinear compensation current.