Multiple adjacent slicewise layout of voltage-controlled oscillator

A method comprising:

• generating a plurality of VCO output signals from a plurality of VCO stages, each VCO stage having a primary path inverter and a buffer inverter, each primary path inverter and each buffer inverter comprising a portion of an interconnection grid interposed between a PMOS portion and an NMOS portion, and each VCO stage of the plurality of VCO stages arranged laterally adjacent in a first direction with respect to other VCO stages;
• generating a plurality of primary path node outputs using the primary path inverters of the VCO stages and conveying the plurality of primary path node outputs between the plurality of primary path inverters using the interconnection grid;
• and
• coupling each primary path node output to the corresponding buffer inverter in each VCO stage, using a corresponding coupling capacitor, each coupling capacitor arranged laterally adjacent, in a second direction, with respect to the PMOS portion of the buffer inverter.