Charge pump circuit configured for positive and negative voltage generation

A positive charge pump circuit, comprising:

• a bootstrap-based level shifting circuit receiving a positive supply voltage at an input node and configured to generate a switching control signal that oscillates between a ground voltage and a boosted positive voltage that is substantially equal to two times the positive supply voltage;
• a circuit including an intermediate node capacitively coupled to receive a clock signal oscillating between a ground voltage and the positive supply voltage and configured to generate a signal at the intermediate node that oscillates between a voltage substantially equal to the positive supply voltage and a voltage substantially equal to two times the positive supply voltage;
• and
• a charge transfer switching circuit having a control node driven by the switching control signal and configured to control transfer of charge from the intermediate node to an output node for generating an output voltage that is substantially equal to two times the positive supply voltage.

A negative charge pump circuit, comprising:

• a bootstrap-based level shifting circuit receiving a ground voltage at an input node and configured to generate a switching control signal that oscillates between a ground voltage and a boosted negative voltage that is substantially equal to a negative of a positive supply voltage;
• a circuit including an intermediate node capacitively coupled to receive a clock signal oscillating between a ground voltage and the positive supply voltage and configured to generate a signal at the intermediate node that oscillates between a voltage substantially equal to the positive supply voltage and a voltage substantially equal to the negative of the positive supply voltage;
• and
• a charge transfer switching circuit having a control node driven by the switching control signal and configured to control transfer of charge from the intermediate node to an output node for generating an output voltage that is substantially equal to the negative of the positive supply voltage.

A charge pump circuit, comprising:

• an input voltage node;
• an output voltage node;
• a first intermediate node capacitively coupled to receive a first clock signal;
• a second intermediate node capacitively coupled to receive a second clock signal;
• a first switching circuit including a first transistor having a source node coupled to receive a first signal at the first intermediate node and a second transistor having a source node coupled to receive a third clock signal, wherein the second clock signal is a logical inverse of the third clock signal;
• a second switching circuit including a third transistor having a source node coupled to receive a second signal at the second intermediate node and a fourth transistor having a source node coupled to receive a fourth clock signal, wherein the first clock signal is a logical inverse of the fourth clock signal;
• a third switching circuit including a fifth transistor having a source node coupled to the input node, a sixth transistor having a source node coupled to the output node, and wherein a gate node of at least one of the fifth and sixth transistors is coupled to receive a third signal at a common drain of the first switching circuit, wherein a common drain of the third switching circuit is capacitively coupled to respectively receive the first clock signal;
• and
• a fourth switching circuit including a seventh transistor having a source node coupled to the input node, an eighth transistor having a source node coupled to the output node, and wherein a gate node of at least one of the seventh and eighth transistors is coupled to receive a fourth signal at a common drain of the second switching circuit, wherein a common drain of the fourth switching circuit is capacitively coupled to receive the second clock signal.