Step height mitigation in resistive random access memory structures

A method for forming a memory structure, comprising:

• forming first and second conductive structures on a substrate, wherein the first and second conductive structures comprise first and second pairs of sidewall surfaces, respectively;
• depositing a dielectric layer on the substrate, wherein first and second portions of the dielectric layer cover the first and second pairs of sidewall surfaces, respectively;
• forming a masking layer on the second conductive structure and the second portion of the dielectric layer;
• etching the first portion of the dielectric layer such that:
• portions of the first pair of sidewall surfaces are exposed;
• and
• the second portion of the dielectric layer is protected by the masking layer;
• and
• forming a memory stack on the exposed portions of the first pair of sidewall surfaces and on a top surface of the first conductive structure.

A method for forming a memory structure, comprising:

• forming first and second conductive structures on a substrate;
• depositing a dielectric layer on the substrate;
• etching a first portion of the dielectric layer surrounding the first conductive structure, such that the first portion of the dielectric layer is recessed relative to a second portion of the dielectric layer surrounding the second conductive structure;
• depositing a memory stack on the first and second portions of the dielectric layer and on the first and second conductive structures;
• and
• patterning the memory stack to form a memory structure that covers a top surface of the first conductive structure.