Reducing parasitic bottom electrode resistance of embedded mram

A method of forming an embedded magnetoresistive random-access memory (MRAM) device, comprising:

• depositing a sacrificial layer over a first interlayer dielectric and a portion of a metal wiring layer over a semiconductor device;
• depositing a dielectric layer over a top surface of the sacrificial layer;
• forming a bottom metal electrode over the portion of the metal layer in the semiconductor device;
• depositing a magnetic tunnel junction (MTJ) stack covered by a hardmask;
• etching a portion of the MTJ stack, a portion of the hardmask, a first portion of the dielectric layer, and a first portion of the sacrificial layer;
• forming a sidewall spacer around the MTJ stack, around a remaining portion of the dielectric layer, and around a remaining portion of the sacrificial layer;
• removing the remaining portion of the sacrificial layer;
• depositing an inner metal over the portion of the metal layer in the semiconductor device, around the bottom metal electrode, and over an exposed bottom surface of the remaining portion of the dielectric layer;
• and
• selectively etching exposed portions of the inner metal to form a ring of inner metal around a portion of the bottom metal electrode.