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AssigneeIntel Corporation
InventorsAndy Chih-Hung Wei, Sean T. Ma, Piyush Mohan Sinha
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Described herein are transistor arrangements fabricated by forming a metal gate cut as a trench that is non-selective to the gate sidewalls, in an etch process that can remove both the gate electrode materials and the surrounding dielectrics. Such an etch process may provide improvements in terms of accuracy, cost-efficiency, and device performance, compared to conventional approaches to forming metal gate cuts. In addition, such a process may be used to provide power rails, if the trench of a metal gate cut is to be at least partially filled with an electrically conductive material. Because the electrically conductive material is in the trench and may be in between the fins, as opposed to being provided over the fins, such power rails may be referred to as “recessed.” Providing recessed power rails may provide improvements in terms of reduced metal line resistance and reduced voltage droop.
A transistor arrangement, comprising:
A transistor arrangement, comprising:
A method of forming a transistor arrangement, the method comprising:
Dependencies are inferred from the claim text.