Circuit Devices with Gate Seals
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSheng-Chou Lai, Tsung-Yu Chiang
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Abstract
Various examples of a circuit device that includes gate stacks and gate seals are disclosed herein. In an example, a substrate is received that has a fin extending from the substrate. A placeholder gate is formed on the fin, and first and second gate seals are formed on sides of the placeholder gate. The placeholder gate is selectively removed to form a recess between side surfaces of the first gate seal and the second gate seal. A functional gate is formed within the recess and between the side surfaces of the first gate seal and the second gate seal.
Claims20
A semiconductor structure, comprising:
- a semiconductor fin protruding from a substrate;
- an interfacial layer disposed over a channel region of the semiconductor fin;
- a metal gate stack disposed over the interfacial layer;
- a gate seal disposed along a sidewall of the metal gate stack and in physical contact with the interfacial layer;
- and
- a gate spacer disposed along the gate seal, wherein a bottom portion of the gate spacer extends along to physically contact the interfacial layer.
A semiconductor structure, comprising:
- a fin extending vertically from a semiconductor substrate;
- source/drain (S/D) features disposed in the fin;
- a first oxide layer disposed on the fin and extends to contact the S/D features;
- a gate structure disposed over the first oxide layer;
- a second oxide layer disposed along a sidewall of the gate structure to directly contact the first oxide layer;
- and
- a gate spacer disposed along the second oxide layer, wherein a horizontal portion of the gate spacer directly contacts the first oxide layer.
A semiconductor structure, comprising:
- a semiconductor fin protruding from a substrate;
- an interfacial layer disposed over a channel region of the semiconductor fin;
- a gate structure disposed over the interfacial layer, wherein the gate structure includes a gate dielectric layer and a gate electrode over the gate dielectric layer;
- a dielectric gate seal disposed on a sidewall of the gate structure;
- and
- a gate spacer disposed on the dielectric gate seal, wherein the dielectric gate seal defines a sidewall of the gate dielectric layer and a sidewall of the gate spacer, respectively, and wherein a bottom surface of the gate spacer laterally extends along and is in direct contact with the interfacial layer.
Dependencies are inferred from the claim text.