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US 2021/0280685 A1Published application
Low noise and high-performance field effect transistors of 2-dimensional materials and methods to fabricate the same
AssigneesKansas State University Research Foundation, Purdue Research Foundation
InventorsSuprem R. Das, David B. Janes, Jiseok Kwon
Life of this patent
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Abstract
A semiconductor device and methods of fabricating and using the same are provided. The semiconductor device comprises a channel region and at least a first, second, and third electrode. The channel region includes a compound having a transition metal and a chalcogen. The thickness of the channel region is about 3 to about 40 atomic layers.
Claims23
A semiconductor device comprising:
- a channel region including a compound having a transition metal and a chalcogen;
- at least a first and second electrode in contact with the channel region;
- a resistive layer in contact with the channel region;
- and
- a third electrode in contact with the resistive layer,
- wherein the channel region has a thickness of about 3 to about 40 atomic layers.
3 more elements
A semiconductor device comprising:
- a channel region having a first surface and a second opposed surface and comprising a compound having a transition metal and a chalcogen, the chalcogen comprising a material selected from the group consisting of:
- selenium and sulfur;
- a first electrode and a second electrode in contact with the first surface of the channel region;
- a resistive layer in contact with the second surface of the channel region;
- a third electrode in contact with the resistive layer;
- and
- wherein the channel region has a thickness of about 3 to about 40 atomic layers.
4 more elements
19-34. (canceled)
A method of providing a conductive path, the method comprising:
- providing a semiconductor device comprising:
- a channel region having a first surface and a second opposed surface and comprising a compound having a transition metal and a chalcogen,
- a first electrode and a second electrode in contact with the first surface of the channel region;
- a resistive layer positioned below the second surface of the channel region,
- a third electrode in contact with the resistive layer, and
- wherein the channel region has a thickness of about 8 to about 20 atomic layers;
- applying a biasing voltage of about 50 to about 500 mV between the first electrode and the second electrode;
- and
- applying a gate voltage between the third electrode and the second electrode.
6 more elements
36-41. (canceled)
43-61. (canceled)
Dependencies are inferred from the claim text.