Novel resistive random access memory device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Chieh MO, Shih-Chi Kuo, Tsai-Hao Hung
Life of this patent
Estimating the term…
Abstract
A memory includes: a dielectric fin formed over a substrate; and a pair of memory cells disposed along respective sidewalls of the dielectric fin, each of the pair of memory cells comprising: a first conductor layer; a selector layer; a resistive material layer; and a second conductor layer, wherein the first conductor layer, selector layer, resistive material layer, and second conductor layer each includes upper and lower boundaries, and at least one of the upper and lower boundaries is tilted away from one of the sidewalls of the dielectric fin by an angle.
Claims20
A memory device, comprising:
- a dielectric fin formed over a substrate;
- and
- a memory cell disposed along and directly contacting a first sidewall of the dielectric fin, the memory cell comprising:
- a first conductor layer, a selector layer, a resistive material layer, and a second-conductor layer, wherein each of the first conductor layer, the selector layer, the resistive material layer, and the second conductor layer directly contact the first sidewall.
A memory device, comprising:
- a plurality of dielectric fins formed over a substrate;
- and
- a plurality of memory cells disposed along respective sidewalls of the plurality of dielectric fins, each memory cells comprising:
- a first conductor layer, a selector layer;
- a resistive material layer, and a second conductor layer, wherein each of the first conductor layer, the selector layer, the resistive material layer and the second conductor layer of each memory cell directly contacts a respective sidewall of a respective dielectric fin;
- and
- a capping layer disposed along and directly contacting each of the first conductor layer, the selector layer, the resistive material layer, and the second conductor layer such that the at least one memory cell is disposed directly between the capping layer and a respective dielectric fin of the plurality of dielectric fins.
A memory device, comprising:
- a dielectric fin formed over a substrate, the dielectric fin having a first side surface and a second side surface opposite the first side surface;
- a first memory cell disposed along and directly contacting the first side surface of the dielectric fin, the first memory cell comprising:
- a first lower conductor layer, a first selector layer, a first resistive material layer, and a first upper conductor layer, wherein each of the first lower conductor layer, the first selector layer, the first resistive material layer, and the first upper conductor layer directly contact the first side surface;
- and
- a second memory cell disposed along and directly contacting the second side surface of the dielectric fin, the second memory cell comprising:
- a second lower conductor layer, a second selector layer, a second resistive material layer, and a second upper conductor layer, wherein each of the second lower conductor layer, the second selector layer, the second resistive material layer, and the second upper conductor layer directly contact the second side surface.
Dependencies are inferred from the claim text.