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US 2021/0280497 A1Published application
Modular technique for die-level liquid cooling
AssigneeIntel Corporation
InventorsXavier F. BRUN, Chandra Mohan JHA
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Abstract
A modular technique for die-level liquid cooling is described. In an example, an integrated circuit assembly includes a first silicon die comprising a device side and a backside opposite the device side. The integrated circuit assembly also includes a second silicon die comprising a plurality of fluidly accessible channels therein. A dielectric interface directly couples the second silicon die to a backside of the first silicon die.
Claims25
An integrated circuit assembly, comprising:
- a first silicon die comprising a device side and a backside opposite the device side;
- a second silicon die comprising a plurality of fluidly accessible channels therein;
- and
- a dielectric interface directly coupling the second silicon die to a backside of the first silicon die.
1 more element
An integrated circuit assembly comprising:
- at least one package comprising:
- a first silicon die comprising a device side and a backside opposite the device side;
- a second silicon die coupled directly to the backside of the first silicon die by a dielectric interface, the second silicon die comprising a plurality of channels therein and a fluid inlet operable to deliver a fluid to the plurality of channels and a fluid outlet;
- and
- a package substrate coupled to the device side of the first silicon die.
2 more elements
A method of fabricating an integrated circuit assembly comprising:
- depositing a first dielectric layer on a backside of a first silicon die, the backside opposite a device side of the first silicon die;
- depositing a second dielectric layer on a second silicon die, the second silicon die comprising a plurality of fluidly accessible channels therein;
- and
- bonding the first dielectric layer directly to the second dielectric layer.
1 more element
Dependencies are inferred from the claim text.