Dummy fin template to form a self-aligned metal contact for output of vertical transport field effect transistor

A method of forming a semiconductor device, the method comprising:

• forming a plurality of fins;
• forming a source/drain layer adjacent to the fins;
• forming a shallow trench isolation region adjacent to the source/drain layer;
• forming gate stacks surrounding the fins, a dummy fin template comprising at least one fin of the fins and at least one of the gate stacks surrounding the at least one fin, fill material being on the gate stacks;
• forming a trench through the fill material by removing the dummy fin template, such that a portion of the source/drain layer is exposed in the trench, the shallow trench isolation region separating the portion of the source/drain layer from another portion of the source/drain layer, wherein the another portion is coupled to a buried power rail through a conductive via and is coupled to a first fin of the fins, a second fin of the fins being coupled to the portion;
• and
• forming a source/drain metal contact on the portion of the source/drain layer in the trench.