US 2021/0280432 A1 · SEMICONDUCTOR DEVICE STRUCTURE HAVING GATE DIELECTRIC LAYER

Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an isolation layer over the base portion and surrounding the fin portion. The semiconductor device structure includes a metal gate stack over the isolation layer and wrapping around an upper part of the fin portion. The metal gate stack includes a gate dielectric layer and a metal gate electrode layer over the gate dielectric layer, and the gate dielectric layer includes fluorine. A first part of the isolation layer is not covered by the metal gate stack, the first part includes fluorine, and a first concentration of fluorine in the first part increases toward a first top surface of the first part.

Claims20

Dependent claims

A semiconductor device structure, comprising:

a substrate having a base portion and a fin portion over the base portion;
an isolation layer over the base portion and surrounding the fin portion;
and
a metal gate stack over the isolation layer and wrapping around an upper part of the fin portion, wherein the metal gate stack comprises a gate dielectric layer and a metal gate electrode layer over the gate dielectric layer, the gate dielectric layer comprises fluorine,
a first part of the isolation layer is not covered by the metal gate stack, the first part comprises fluorine, and a first concentration of fluorine in the first part increases toward a first top surface of the first part.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application

17/327,958Filed 24 May 2021

Priority

13 Jul 2018

Published

9 Sep 2021

Term ends

Not estimatedThe source records don’t support an estimate.

Classification17 codes

H10P 36/03
Gettering within semiconductor bodies: within silicon bodies
H10D 30/024
Of FETs having insulated gates [IGFET]: of fin field-effect transistors [FinFET]
H10D 30/6211
Fin field-effect transistors [FinFET]: having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
H10D 30/797
Arrangements for exerting mechanical stress on the crystal lattice of the channel regions: being in source or drain regions, e.g. SiGe source or drain

Semiconductor device structure having gate dielectric layer

Life of this patent

Semiconductor device structure having gate dielectric layer

Life of this patent

Abstract

Claims20