Multiplication of a matrix with an input vector

A computer program product for performing a multiplication of a matrix with an input vector, the computer program product comprising:

• one or more computer readable storage media and program instructions stored on the one or more computer readable storage media, the program instructions comprising:
• program instructions to subdivide a matrix into logical segments, the matrix being given in a sparse-matrix data format;
• program instructions to obtain one or more test vectors;
• and
• program instructions to perform an optimization cycle further comprising:
• for each of the test vectors, program instructions to perform a cache performance test, the cache performance test further comprising:
• for each of the logical segments, program instructions to perform a test multiplication by providing a respective logical segment and a respective test vector to an input of a matrix-vector multiplication algorithm, and
• during the test multiplication of each segment, program instructions to determine a cache performance value of a cache of a processor performing the test multiplication.

A computer system performing a multiplication of a matrix with an input vector, the computer system comprising:

• one or more computer processors;
• one or more computer readable storage media;
• and
• program instructions stored on the computer readable storage media for execution by at least one of the one or more processors, the program instructions comprising:
• program instructions to subdivide a matrix into logical segments, the matrix being given in a sparse-matrix data format;
• program instructions to obtain one or more test vectors;
• and
• program instructions to perform an optimization cycle further comprising:
• for each of the test vectors, program instructions to perform a cache performance test, the cache performance test further comprising:
• for each of the logical segments, program instructions to perform a test multiplication by providing a respective logical segment and a respective test vector to an input of a matrix-vector multiplication algorithm, and
• during the test multiplication of each segment, program instructions to determine a cache performance value of a cache of a processor performing the test multiplication.