Using multi-tiered cache to satisfy input/output requests

A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processor to cause the processor to:

• receive, by the processor, a stream of incoming input/output (I/O) requests;
• use, by the processor, one or more buffers in a primary cache to satisfy all of the incoming I/O requests, wherein the primary cache is coupled to a secondary cache and a data storage device;
• monitor, by the processor, an available capacity of the one or more buffers in the primary cache;
• in response to determining that the available capacity of the one or more buffers in the primary cache is outside a predetermined range:
• allocate, by the processor, one or more buffers in the secondary cache,
• use, by the processor, the one or more buffers in the secondary cache to satisfy at least some of the incoming I/O requests, and
• use, by the processor, the one or more buffers in the primary cache to satisfy a remainder of the incoming I/O requests;
• and
• in response to determining that the available capacity of the one or more buffers in the primary cache is not outside the predetermined range:
• use, by the processor, the one or more buffers in the primary cache to satisfy all of the incoming I/O requests.

A system, comprising:

• a processor, wherein the processor is coupled to a primary cache and a secondary cache;
• and
• logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to:
• receive, by the processor, a stream of incoming input/output (I/O) requests;
• use, by the processor, one or more buffers in a primary cache to satisfy all of the incoming I/O requests, wherein the primary cache is coupled to a secondary cache and a data storage device;
• monitor, by the processor, an available capacity of the one or more buffers in the primary cache;
• in response to determining that the available capacity of the one or more buffers in the primary cache is outside a predetermined range:
• allocate, by the processor, one or more buffers in the secondary cache,
• use, by the processor, the one or more buffers in the secondary cache to satisfy at least some of the incoming I/O requests, and
• use, by the processor, the one or more buffers in the primary cache to satisfy a remainder of the incoming I/O requests;
• and
• in response to determining that the available capacity of the one or more buffers in the primary cache is not outside the predetermined range:
• use, by the processor, the one or more buffers in the primary cache to satisfy all of the incoming I/O requests.