Memory circuit, information processing circuit, and information processing apparatus

An information processing circuit, comprising:

• a memory circuit including a plurality of nonvolatile memory cells, each of which loses stored data when stored data is read therefrom, wherein
• the memory circuit is configured to:
• read data from a first memory cell in the plurality of nonvolatile memory cells when the first memory cell is designated by a first instruction received by the memory circuit, but not rewrite the data back to first memory cell after the first memory cell has been read, and
• read data from a second memory cell in the plurality of nonvolatile memory cells when the second memory cell is designated by a second instruction received by the memory circuit and rewrite the data back to the second memory cell after the second memory cell has been read.

An information processing apparatus, comprising:

• a memory circuit including:
• a plurality of nonvolatile memory cells each of which loses stored data when read;
• and
• a control circuit configured to:
• receive a first instruction, then read data from a first memory cell designated by the first instruction but not rewrite the read data back to the first memory cell, and
• receive a second instruction, then read data from a second memory cell designated by the second instruction and rewrite the read data back to the second memory cell;
• and
• an information processing circuit configured to transmit the first instruction and the second instruction.