Path based controls for ate mode testing of multicell memory circuit

A circuit, comprising:

• a memory;
• a path selector having a decoder, a multiplexer, and an output, the path selector configured to receive a control signal from automatic test equipment (ATE), an output of the decoder coupled to drive the multiplexer, the path selector configured to generate in response to the control signal, using the decoder and the multiplexer, an output signal that indicates which of a plurality of data paths is selected;
• and
• a gating circuit having an input coupled to the output of the path selector and comprising a plurality of clock gates, the clock gates configured to enable at least one of the plurality of logic endpoints to access the memory via the selected data paths in response to the input.

A method, comprising:

• receiving a control signal from automatic test equipment (ATE) to control data access to data paths that are operatively coupled between a plurality of memory instances and a plurality of logic endpoints;
• generating an output signal that indicates which of the data paths is selected in response to the control signal;
• enabling at least one clock gate in a gating circuit to control which of the selected data paths are to be accessed by at least one of the plurality of logic endpoints in response to the output signal;
• and
• accessing at least one of the plurality of memory instances, by the at least one of the plurality of logic endpoints, via the selected data paths enabled by the enabling.